| 摘要 |
<p>A three-state output buffer circuit with built-in protection against power-rail corruption by bus-imposed voltages when the buffer is in its high-impedance state. In particular the invention protects the high-potential power rail of the high-Z buffer against voltages appearing at the buffer's output node which exceed the voltage of the buffer's high-potential rail. It prevents this overvoltage from finding its way to the power-rail, and thus has application to those situations where a common bus is coupled to a variety of circuits including, for example, 3.3-volt buffers and 5-volt buffers. The invention provides this protection without the 'dead zone' of prior-art and related-art circuits. Furthermore, the present invention also has application where it is the low-potential power rail that needs protecting, in situations where the bus may impose voltages at the buffer's output node that are lower than the voltage of the buffer's low-potential power rail. The protection circuit utilizes a pseudo-power rail (PVCC) which can be used to adjust the bias on the output transistor's (QP40) bulk and so to prevent a leakage path from occurring between the output node and a power rail (VCC) via the output transistor source/bulk junction. To minimize or avoid a 'dead zone' in the charging of the pseudo-rail, a one-way link (LINK+) is established directly between the power rail (VCC) and the pseudo-power rail (PVCC).</p> |
