| 摘要 |
A first signal plane (22) having a first conductor pitch and dielectric thickness, is provided for critical signals determined based on sensitivity to cross-talk and line resistance. A second signal plane (24) having a conductor density of approximately a factor of four greater than the first signal plane and reduced dielectric thickness, is provided for non-critical signals. Multi-layer arrangements employing signal planes of the first and second types are combined in printed wiring boards for multi-chip module systems to provide maximum overall density with greatest miniaturization while maintaining signal integrity and adapting available design processes for cost-effective implementation. <IMAGE> |
