Phase-locked oscillator circuit.

摘要

In a phase-locked oscillator circuit that generates a stable output signal synchronized to the phase of the input signal, the achievement of a broad pull-in frequency range being and an output signal of stable frequency. An input-stage phase-locking circuit 2 wherein the phase of the 1st frequency-converted output signal from the 1st frequency-conversion section 6 is compared with the phase of the input signal by the 1st phase-comparison circuit 1, and wherein the phase of the 1st frequency-converted output signal is controlled, a processing section 3 which determines the frequency component of the input signal based on the phase-comparison output signal from 1st phase-comparison circuit 1, and an output-stage phase-locking circuit 5 wherein the phase of the 2nd frequency-converted output signal from the 2nd frequency-conversion section 7 is compared with the phase of the input signal by the 2nd phase-comparison circuit 4, and wherein the phase of the 2nd frequency-conversion section 7 is controlled based on the resulting phase-comparison output signal and the phase-comparison output signal from the 1st phase-comparison circuit 1, thus controlling the phase of the 2nd frequency-converted output signal. <IMAGE>