| 摘要 |
A variable gain amplifier circuit includes four transistors. The pair of first and third transistors and the other pair of second and fourth transistors are provided with signals (VA, VC) and (VB, BD), respectively, which are obtained through application of the first and second biases to the differential input signals. Then, both pairs perform a differential operation in response to the respective signals applied thereto. On the other hand, in the pair of first and second transistors and the other pair of third and fourth transistors, each pair divides a current which is provided thereto between respective transistors. Differential output signals can be obtained from the pair of second and fourth transistors, and a gain thereof can be controlled according to the current flowing through the first and third transistors. As compared with the prior art, the number of transistors which are connected in series is reduced by one, so that signals to be processed becomes larger by a collector-emitter saturation voltage of the transistor.
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