发明名称 Charge summing digital to analog converter
摘要 A D/A converter which develops the analog output by summing binary-weighted packets of electrical charge. Charge metering techniques are used to generate and sum the charge packets. It is particularly suited to application in the data line driver circuits of thin-film transistor liquid crystal displays. Various embodiments use single or multiple charge packet generators, and the multiple version may generate the packets for the various bits simultaneously, For the highest speed, or else sequentially, for the largest voltage dynamic range.
申请公布号 US5400028(A) 申请公布日期 1995.03.21
申请号 US19920968697 申请日期 1992.10.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 SCHLIG, EUGENE S.
分类号 G09G3/20;G09G3/36;H03M1/66;H03M1/74;(IPC1-7):H03M1/66 主分类号 G09G3/20
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