发明名称 PACKET OUTPUT CONTROL SYSTEM
摘要 <p>PURPOSE:To decrease the abolition ratio of a packet in a buffer memory provided at the intersection of an input and output highway in a packet output control system in a packet switchboard. CONSTITUTION:The packet switchboard in which the packet inputted to plural input highways 1 is stored in a buffer memory 3 provided at the intersection with an output highway 2, and outputted to the output highway 2, is equipped with a storage amount monitoring means 5 which transmits information when the buffer memory whose storage packet amount is beyond a thereshold value is generated. A reading control part 10 which operates control for outputting the packet stored in each buffer memory 3 through an outputting part 4 to the output highway is also equipped with a successive reading control means 11 which selects the buffer memory in a constant sequence, and executes the output of the packet, and a maximum storage buffer priority reading control means 12 which executes the priority output of the packet stored in the buffer memory 3 whose packet storage amount exceeds the thereshold value.</p>
申请公布号 JPH0779252(A) 申请公布日期 1995.03.20
申请号 JP19930222722 申请日期 1993.09.08
申请人 FUJITSU LTD 发明人 SOMIYA TOSHIO;WATANABE NAOSATO;KATO MASABUMI;TOMONAGA HIROSHI;KAMOI EDAMASU
分类号 H04L12/56;(IPC1-7):H04L12/56 主分类号 H04L12/56
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