| 摘要 |
PURPOSE:To provide a mask pattern verifying device capable of improving the efficiency of processing especially for a circuit including many wiring areas in order to reduce layout verifying time to be extended in accordance with the size increment of an integrated circuit. CONSTITUTION:This mask pattern verifying device for verifying the mask pattern of an integrated circuit is provided with a strip-like area specifying means 4 for specifying a long strip-like area on the mask pattern, a reading means 2 for reading out graphic data located in the strip-like area specified by the means 4 from an auxiliary storage device 1 and stores the read data in a main storage device 3, a block specifying means 5 for specifying a block consisting of one or more continuous strip-like areas, a graphic data transfer judging means 7 for judging whether graphic data in the device 3 are included in a strip-like area to be remarked next on the boundary of the block specified by the means 5 or not, and a graphic data deleting means 8 for deleting graphic data judged as the one not included in the strip-like area by the means 7. |
