| 摘要 |
PURPOSE:To provide an image processor which can execute the gray level histogram processing of images at a high speed in real time with a low power consumption and can execute image-area-classified gray level cumulative addition processing valid for simple pattern matching or the like at a high speed in time with a low power consumption as well. CONSTITUTION:Pipeline processing configuration is provided by using one port of a two-port memory as read only port, using the other port as a write only port, connecting a flip-flop 22 to the output of an adder 11 and providing a path as the input of the adder 11 so that read data from the two-port memory 10 can select the output of the flip-flop 22 being the output result of the adder 11 from a multiplexer 14. Thus, the gray level histogram processing of images or the gray level cumulative addition processing by image areas can be executed at a high speed at real time. |
