| 摘要 |
PURPOSE:To reduce the amount of hardware by detecting the case, where a overflow is brought about, from the combination of the number of negatives of operands, the final carries, and the value of the sign part. CONSTITUTION:An addition circuit 1 which adds three fixed-point data A to C expressed by complements of two, an operand negative detecting circuit 2 which detects the number of negatives of operands of data A to C, a final carry generating circuit 3 which generates final carries C0 and C1 from the addition result of data A to C, and an overflow detecting circuit 4 which is connected to circuits 1 to 3 and detects fixed-point overflow from the combination of the number of negatives of operands detected by the circuit 2, carries C0 and C1 generated by the circuit 3, and a sign S of the addition result from the circuit 1 are provided. The case where a overflow is brought about is detected from the combination of the number of negatives of operands, final carries, and the value of the sign part. Thus, overflow is detected with a smaller amount of hardware than conventional at the time of addition of fixed-point data. |
