发明名称 CURRENT LIMITING CIRCUIT
摘要 PURPOSE: To protect an instant overcurrent by providing a vertical depletion type MOS of double diffusion vertical type or an IGBT transistor and constituting the source and the gate of the transistor with one metallization. CONSTITUTION: A metallization 44 is formed by depositing several conductive layers. The same metallization is formed on the lower surface of an element. A two-terminal element with the metallization of upper and lower surfaces can be obtained corresponding to a conductive VDMOS depletion transistor for playing a role of source metallization and a gate metallization. An element can be mounted between two conductive wafers that play a role of a heat sink with upper and lower surfaces that are coated by metallization. The element receives an overload at the moment when the load is absorbed by the element and can be operated as a current-limiting circuit in an application field to be generated.
申请公布号 JPH0774357(A) 申请公布日期 1995.03.17
申请号 JP19940111760 申请日期 1994.04.28
申请人 SGS THOMSON MICROELECTRON SA 发明人 KURISUTOFU EERA;FUIRITSUPU RECHIYURUKU;JIYAN JIYARADO;JIYANNRUI SANSHIE
分类号 H01L27/04;H01L21/822;H01L27/02;H01L29/739;H01L29/78;H01L29/86;H02H9/02;(IPC1-7):H01L29/78 主分类号 H01L27/04
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