发明名称 A/D CONVERTER OF ACCUMULATING METHOD
摘要 The circuit for correctly converting the analog signal to the digital one includes a sample hold circuit (1) sampling and accumulating the input analog signal, a comparator (3) comparing the accumulated analog signal to the upper (VA) and lower (OV) reference voltages to provide the control signal, a constant current circuit (4) discharging the accumulated analog signal while the control signal is applied, a clock generator (5) generating the counting clock, a counter (6) counting the input clock while the control signal is applied, a timing circuit (2) synchronizing the sampling, holding, and counting times, and a converter (7) converting the input parallel data to the serial one.
申请公布号 KR950002299(B1) 申请公布日期 1995.03.16
申请号 KR19880008316 申请日期 1988.07.05
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 MOK, CHOL - UNG
分类号 H03M1/52;(IPC1-7):H03M1/52 主分类号 H03M1/52
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