Switching high speed protocol units

摘要

A high speed switching device enabling data exchanges of data organised into protocol units between a multiplicity of processing modules 25, includes a multiplicity of switching interface modules 21 each including an FIFO input memory 29 connected to an input bus 27 and an FIFO output memory 28 connected to an output bus 26, a switching module 22 capable of connecting each of the said input buses with each of the output buses, and an arbitration and command module commanding the switching effected by the said switching module once the said destination switching interface module 21 has at least one free space.