发明名称 |
Serial access memory with column address counter and pointers |
摘要 |
A serial access memory has multiple memory blocks, each with a row-and-column array of memory cells for storing data. Data access is synchronized with a clock signal. A column address counter counts the clock signal to generate a column address. A block selector decodes upper bits of the column address to generate a series of block select signals, which are distributed to the memory blocks. In each memory block a shift register receives and shifts one block select signal to generate a series of column select signals.
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申请公布号 |
US5398209(A) |
申请公布日期 |
1995.03.14 |
申请号 |
US19930080482 |
申请日期 |
1993.06.18 |
申请人 |
OKI ELECTRIC INDUSTRY CO., LTD. |
发明人 |
IWAKIRI, ITUROU;MURAKAMI, KOJI |
分类号 |
G06F5/16;G11C8/04;G11C11/401;(IPC1-7):G11C8/00 |
主分类号 |
G06F5/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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