发明名称 |
Method for fabrication of semiconductor device having polycrystalline silicon and metal silicides |
摘要 |
A method of fabricating a semiconductor device having a semiconductor substrate, a MOS transistor formed on one surface of the semiconductor substrate, and a capacitor is disclosed. The MOS has a gate electrode with a polycrystalline silicon layer and a metal silicide layer. The capacitor includes a first polycrystalline silicon layer which forms a lower electrode layer, an insulating interlayer, and a second polycrystalline silicon layer which forms an upper electrode, the first and second polycrystalline silicon layers sandwiching the insulating interlayer.
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申请公布号 |
US5397729(A) |
申请公布日期 |
1995.03.14 |
申请号 |
US19930076119 |
申请日期 |
1993.06.14 |
申请人 |
ASAHI KASEI MICROSYSTEMS CO., LTD. |
发明人 |
KAYANUMA, SACHIRO;IKI, KOJI |
分类号 |
H01L21/02;H01L27/06;(IPC1-7):H01L21/70;H01L27/00 |
主分类号 |
H01L21/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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