| 摘要 |
The method for using double ion implantation processes to form a LDD (lightly doped drain) transistor, includes the steps of firstly implanting impurity ions into the cell array region and peripheral circuit region having gate electrodes (18) at an incline of 30 degrees, forming an ion implantation preventing film (20) on the peripheral circuit region, and secondly implanting impurity ions thereinto at an incline of 7 degrees to form a first impurity diffusion region (200), thereby reducing shadowing effects and junction leakage current between the impurity diffusion region and semiconductor substrate.
|
