| 摘要 |
A driver circuit in an integrated circuit includes a flip-flop circuit and a plurality of AND gates. The flip-flop circuit causes an external control signal which is supplied externally to synchronize with a clock signal, and produces an internal control signal. The AND gates control a plurality of outputs based on a data signal in accordance with the internal control signal. Since the internal control signal is synchronized with the clock signal, changes in the outputs from the AND gates are delayed from the timing of the clock signal. Thus, it is possible to prevent the occurrence of malfunction caused by a switching current to flow in transient of changes in the outputs.
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