发明名称 DATA TRANSFER CONTROLLER
摘要 PURPOSE: To make a bus transfer protocol programmable and to improve data transferring efficiency by transferring the plural data of a bit value smaller than a prescribed bit width on the bus of the prescribed bit value in one cycle by a programmed operations. CONSTITUTION: This device is provided with a plotting control chip 10, and video chips V1-V4. They are connected through a 64 bit data bus 20, 4 bit program signal line 22, and 1 bit ready signal line 24. Avideo chip V1 is constituted of a decoder DEC1, program buffer address register PBAR, sequencer SEQ, program buffer PB, decoder DEC 2, address control unit 54, selector SEL, and each kind register. The video chip V1 is connected through a data bus 26 with a video buffer APA1.
申请公布号 JPH0765180(A) 申请公布日期 1995.03.10
申请号 JP19930199550 申请日期 1993.08.11
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 TAKAYANAGI KAZUNORI;WATANABE SHINPEI
分类号 G06F13/36;G06F13/38;G06T11/00;G09G5/39;(IPC1-7):G06T11/00 主分类号 G06F13/36
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