| 摘要 |
PURPOSE:To realize a memory cell structure enhanced in yield and reliability by a method wherein a unit memory cell is increased in planar area, and an overlap margin between a storage node and a storage node contact is enlarged, and a short circuit is prevented from occurring between a bit line and a storage node contact. CONSTITUTION:Bit lines 15 are set larger than word lines 4 in arrangement pitch, and a storage node contact 17 is disposed in each of rectangular regions surrounded with the bit lines 15 and the word lines 4. Furthermore, the storage node contacts 17 are so arranged as to make both a distance between the centers of the adjacent storage node contacts 17 and another distance between the centers of a bit line contact 16 and the adjacent storage node contact 17 larger than the arrangement pitch of the word lines 4. |
