发明名称 INPUT BUFFER GATE
摘要 PURPOSE:To reduce the power consumption of a pull-up resistor without prolonging the propagation delay time to the emitter of a pnp type transistor(TR) at the time of transiting an input signal to the base of the pnp-type TR from a low level to a high level. CONSTITUTION:The pull-up resistor 21A is set up to high resistance to reduce its power consumption. On the other hand, the input terminal of a CR differential circuit 50 is connected to the base of the pnp-type TR 22 and the output terminal of the circuit 40 is connected to the emitter of the TR 22 through a switching circuit 50, so that a positive pulse is outputted from the output terminal of the circuit 40 at the rising time of an input signal to the base of the TR 22, the circuit 50 is held at ON only when the positive pulse exists and the potential of a power supply voltage feeder VCC is quickly propagated to the emitter through the circuit 50.
申请公布号 JPH0766708(A) 申请公布日期 1995.03.10
申请号 JP19930214603 申请日期 1993.08.30
申请人 FUJITSU LTD;KYUSHU FUJITSU ELECTRON:KK 发明人 YAMAZAKI KOBO
分类号 H03K17/04;H03K19/01;H03K19/013;H03K19/0175 主分类号 H03K17/04
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