| 摘要 |
The write control circuit includes a pull-up portion for connecting the gate and drain of a PMOS transistor whose source receives a control signal for reducing current to the drain of an NMOS transistor whose gate receives an operation voltage, the pull-up portion operating according to a write cycle by applying a power voltage and equalizing signal to the drain and gate of an NMOS transistor whose source is connected to the source of the NMOS transistor, a write driving portion for connecting the source of an NMOS transistor whose drain and gate receive the power voltage and control signal to the common source of the NMOS transistors in the pull-up portion, and to the drain and source of an NMOS transistor whose gate receives a control signal, the write driving portion selecting one cell and writing it, and then equalizing bit line and bit bar line into an identical potential during discharging, and a data input portion for transmitting data to a data bus line in the write driving portion through an inverter.
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