发明名称
摘要 PURPOSE:To minimze the over-head of a frame pattern signal quantity to a transmitting data quantity without increasing the circuit scale and complicatedness by dispersing and inserting a pattern to one bit of the head of a sub-frame and inserting it under special conditions. CONSTITUTION:A pattern for a frame synchronization in a frame which is divided into an N number of the sub-frame and in which respective sub-frames obtain an M bit constitution is dispersed and inserted into one bit of the head of the sub-frame, further, one bit out of remaining M-1 bits is used and a travelling code composed of one word N bit generated from a generating function is inserted. Consequently, in the synchronizing detection, the detection of the frame pattern, namely, the synchronizing detection can be executed by removing the frame bit dispersed and inserted to the head bit of respective sub-frames. Thus, the action speed required at a synchronizing detecting circuit is decreased, the small scale and simplification of the circuit are executed and the synchronzing detecting circuit suitable to the high speed and large capacity transmitting type can be constituted.
申请公布号 JPH0722285(B2) 申请公布日期 1995.03.08
申请号 JP19860156410 申请日期 1986.07.02
申请人 发明人
分类号 H04L7/08;H04J3/06 主分类号 H04L7/08
代理机构 代理人
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