发明名称 |
METHOD FOR MOUNTING CHIP PART |
摘要 |
<p>PURPOSE:To position an optical element with high accuracy at the time of mounting the optical element by self-alignment by utilizing the reflow of solder bumps. CONSTITUTION:AuSn solder bumps 3 are formed on electrode pads 2 provided on a sub-substrate 1 for mounting optical element and a light emitting diode chip 5 having electrode pads 4 for an optical element is put on the bumps 3 (a). When the bumps 3 are melted by heating the sub-substrate 1 on a heating stage 6 and a load is applied to the sub-substrate 1 and chip 5, the solder bumps 3 are deformed and the oxide films on the surfaces of the bumps 3 are broken (6). Therefore, the surface tension required for self alignment (c) is obtained and the chip 5 is positioned with high accuracy.</p> |
申请公布号 |
JPH0758149(A) |
申请公布日期 |
1995.03.03 |
申请号 |
JP19930199411 |
申请日期 |
1993.08.11 |
申请人 |
NEC CORP |
发明人 |
SASAKI JUNICHI;ITO MASATAKA;HONMO HIROSHI;KANAYAMA YOSHINOBU |
分类号 |
H01L21/60;G02B6/42;(IPC1-7):H01L21/60 |
主分类号 |
H01L21/60 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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