发明名称 VIDEO SIGNAL PROCESSING CIRCUIT
摘要 <p>PURPOSE:To set a level of a digital signal proper by providing the equal effect of extension of a dynamic range substantially in the dynamic range of a digital equipment such as an equipment employing a plasma display panel PDP or the like and to eliminate a signal distortion by limiting a level when the level of the digital signal exceeds a predetermined level. CONSTITUTION:An amplitude of an analog input video signal S1, that is, an amplitude being a difference between a black level and a white level is set to be a half the full dynamic range of an A/D converter circuit 1 under the input of a signal with a standard level, and number of bits of an A/D conversion output signal is larger than a bit number of a signal fed to a PDP. For example, the signal for driving the PDP is 6-bit configuration and when 7-bit are adopted for an A/D conversion output, the full dynamic range is set to have 128 steps and the amplitude of the signal S1 is set to be 64 steps being a half of 128 steps. An output of the A/D converter is fed to a comparator 2 and a contrast multiplier 3, and a reference level Vb used for the comparison by the comparator 2 is made coincident with a range lower limit level of the circuit 1.</p>
申请公布号 JPH0759029(A) 申请公布日期 1995.03.03
申请号 JP19930206091 申请日期 1993.08.20
申请人 FUJITSU GENERAL LTD 发明人 OTAWARA MASAYUKI
分类号 H04N5/57;H04N11/04;(IPC1-7):H04N5/57 主分类号 H04N5/57
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