| 摘要 |
PURPOSE:To generate a stable control clock signal that is never broken neither increasing the circuit scale nor needing a fast operation by transmitting the control clock signal only when it is decided that the clock signal is never broken. CONSTITUTION:A switching control circuit 21 decides whether a phase synchronizing state is secured between a 1st clock signal 7 and a 2nd clock signal 8 based on the phase relation between both signals 7 and 8. Then the circuit 21 decides whether a control clock signal is never broken if one of both signals 7 and 8 is cut off. Then a clock switch signal is transmitted to a tristate buffer circuit 22 or 23 to switch the clock signal only when the phase synchronizing state is secured between both signals 7 and 8 and the control clock signal is never broken. |
