| 摘要 |
PURPOSE:To reduce the transient variance of the frequency during synchronism acquisition to shorten the time required for completion of phase synchronism acquisition by not only increase the phase leading-in force in the case of a small phase deviation but also reducing the lead-in speed in the case of a large phase deviation for restoration from a power failure or the like to perform the synchronism acquisition at a certain speed. CONSTITUTION:In the case of phase delay, a timer circuit 13 is triggered by the fall of the output signal of a comparing circuit 11 to generate a pulse signal for phase leading-in having, for example, 100mus pulse width. One having a shorter pulse width of this signal and the output of the comparing circuit 11 is fed back to the synchronism acquisition signal input terminal through an analog switch 17 and a resistor 6 for feedback by AND between them in a gate 15. The lead-in speed in the case of a large phase deviation for restoration from a power failure or the like is reduced to perform the synchronism acquisition at a certain speed. Thus, the transient variance of the frequency on the way of synchronism acquisition is reduced to shorten the time required for completion of phase synchronism acquisition. |
