| 摘要 |
PURPOSE:To quickly and stably switch the frequency with a certain comparsion frequency independently of the channel width by providing a direct digital synthesizer which generates a comparison signal having a corresponding frequency based on the output of a voltage controlled oscillator and phase data set from the outside. CONSTITUTION:An output frequency fv of a direct digital synthesizer DDS 40 is given by fv=fo.PHI/2N. When PHI<2N is selected, the DDS 40 functions as a variable frequency divider which has a frequency division number fo/fv=2N/PHI corresponding to the set value of phase data PHI. Consequently, fo=2N.fR/PHI is true at the time of phase lock with respect to a PLL loop; but when phase data PHI is controlled by PHI=PHIo-i.DELTAPHI (i=0, 1, 2...), the output frequency fo of a voltage controlled oscillator 5 is changed by fo=2N.fR/(PHIo-i.DELTAPHI). Then, PHIis selected as a large value and DELTAPHI is selected as a very small value to arbitrarily reduce the channel step width of the output frequency fo. |
