发明名称 DELAY DETECTION CIRCUIT
摘要 PURPOSE:To shorten the time required at the time of generating synthetic phase signals in a phase signal synthesizer and to suppress the degradation of demodulation characteristics due to inter-code interference. CONSTITUTION:In addition to a phase signal converter 30-1 for detecting the phase of PSK modulation wave signals and quantizing it to the phase signal of M bits, the phase signal converter 30-1 for detecting the phase of signals for which the PSK modulation wave signals are inverted by an inverter 100 and outputting it as the phase signal of M bits is provided. The phase signal synthesizer 110 uses two kinds of the phase signals outputted from the phase signal converters 30-1 and 30-2, extends a quantization bit number from M to M+L and generates the synthetic phase signals. At the time of generating the synthetic phase signals of M+L bits, since the number of the phase signals to be generated in the phase signal synthesizer 110 is reduced by half, the time required for generating the synthetic phase signals is reduced by half.
申请公布号 JPH0758793(A) 申请公布日期 1995.03.03
申请号 JP19930198492 申请日期 1993.08.10
申请人 JAPAN RADIO CO LTD 发明人 SHIMAKATA YUKIHIRO
分类号 H04L27/227 主分类号 H04L27/227
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