发明名称 |
FRAME SYNCHRONIZATION SYSTEM |
摘要 |
PURPOSE:To provide a frame synchronization system which reduces missynchornization even for a frame pattern consisting of a small number of bits by making a sent data signal pseudo-random and then inserting the frame pattern. CONSTITUTION:On a transmission side, the multiplexed data signal from a time division multiplexing part 3 is made pseudo-random by a scrambler 41 and a frame inserting circuit 42 inserts the frame pattern into the signal. On a reception side, a frame synchronizing circuit 44 detects the frame pattern from the received pseudo-random multiplexed data signal and attains frame synchronization. The pseudo-random multiplexed data signal is restored by a following descrambler 45 to the original multiplexed data signal. |
申请公布号 |
JPH0758738(A) |
申请公布日期 |
1995.03.03 |
申请号 |
JP19930203799 |
申请日期 |
1993.08.18 |
申请人 |
NEC CORP;NEC SHIZUOKA LTD |
发明人 |
HASHIMOTO SHINJI;SONE MASAHIRO |
分类号 |
H04J3/06;H04L7/08;H04L9/06;H04L9/12;H04L9/14 |
主分类号 |
H04J3/06 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|