发明名称 TIMING REGENERATING DEVICE
摘要 PURPOSE:To provide a device which is not affected by a data pattern and generates a stable clock even for a differentiation detection signal and suits to IC-implementation as to a timing regenerating device which detects a bit phase from a digital regenerated signal. CONSTITUTION:A phase comparator as a constituent element of the timing regenerating device consists of a T/2 edge pulse generating circuit 14 (24), an edge trigger RS-FF 15 (25), and an arithmetic circuit 16 (26) and generates an error signal corresponding to time differences only between respective edges of input data and edges of a clock generated by a voltage-controlled oscillator 9. For a signal as an object of PR(1, 0, -1) detection, two comparing circuits 13 and 23 detect edge data and compare their phases with a clock separately and an adding circuit 18 adds the phase errors, so that the accurate clock is generated without being affected by the data pattern.
申请公布号 JPH0758736(A) 申请公布日期 1995.03.03
申请号 JP19930206248 申请日期 1993.08.20
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HASHIMOTO SEIICHI;SHIMOTASHIRO MASAFUMI
分类号 G11B20/14;H03L7/08;H04L7/033 主分类号 G11B20/14
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