发明名称 MEMORY CELL FOR SRAM
摘要 PURPOSE:To improve softerror-resistance without lowering write characteristics. CONSTITUTION:The SRAM memory cell is composed of a flip-flop 4 which is formed by a first inverter pattern 2 and a second inverter 3, the first word transistor 18 which is connected to the first inverter 2 through the intermediary of the first memory node 17, and the second word transistor 23 which is connected to the second inverter 3 through the intermediary of the second memory node 22. The series-connected first diode 25 and the first capacitor 26 are connected to the first memory node 17, and the series-connected second diode 27 and the second capacitor 28 are connected to the second memory node 22.
申请公布号 JPH0758220(A) 申请公布日期 1995.03.03
申请号 JP19930222049 申请日期 1993.08.12
申请人 SONY CORP 发明人 ICHIKAWA TSUTOMU
分类号 H01L27/11;G11C11/41;H01L21/8244;H01L29/78;H01L29/786 主分类号 H01L27/11
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