| 摘要 |
PURPOSE:To secure a large alignment margin of a trench capacitor and an element region by a method wherein an epitaxial semiconductor layer, which becomes the channel of a MOS transistor, is formed on the surface of a substrate and in the upper part of a trench. CONSTITUTION:An epitaxial Si layer 40, which comes into contact with the surface of an element region and a storage electrode 6 that are isolated with each other, is formed on the substrate surface and in the upper part of a trench 4. Gate electrodes 81 to 84 are formed on the epitaxial Si layer 40 through the intermediary of a gate insulating film 7. Three gate electrodes form a word line by patterning in such a manner that it is continuously formed in one direction of a cell array. On both sides of the gate electrodes, an n<+> type diffusion layer 9 is formed on the epitaxial Si layer 40. This n<+> type diffusion layer 9 is the source/drain of a planar type MOS transistor, and it is directly connected to a storage electrode 9. According to this constitution, the large alignment margin of a trench capacitor and an element region can be secured. |
