发明名称 Process for fabricating double poly high density buried bit line mask ROM
摘要 In accordance with the invention, a double poly process is used to double the memory density of a buried bit line ROM on the same silicon area. In particular the word-line pitch is decreased to increase the cell density in a direction perpendicular to the word lines. The invention uses a self-aligned method for ROM code implantation and a polyplanarization by chemical-mechanical polishing (CMP) to achieve a self aligned double poly word line structure.
申请公布号 US5393233(A) 申请公布日期 1995.02.28
申请号 US19930092190 申请日期 1993.07.14
申请人 UNITED MICROELECTRONICS CORPORATION 发明人 HONG, GARY;YANG, MING-TZONG;HSUE, CHEN-CHIU
分类号 H01L21/8246;(IPC1-7):H01L21/70 主分类号 H01L21/8246
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