发明名称 |
Digital to analog converter |
摘要 |
A D-A converter in which a phase deviation in load current is inhibited and a digital to analog conversion accuracy is enhanced. A data dividing block (7) is provided to switch a path depending upon a value of the most significant bit of an N bit digital signal (DATA) so as to conduct the D-A converting and the V-I converting based upon an (N-1)bit digital signal (DATA(N-1)) in either one of a first analog current output path consisting of a D-A converting block (11) and a V-I converting unit (210) and a second analog current output path consisting of a D-A converting block (12) and a V-I converting unit (220). Thus, since a large range of load current can be obtained and a phase deviation in the load current can be inhibited, a D-A conversion accuracy is enhanced.
|
申请公布号 |
US5394146(A) |
申请公布日期 |
1995.02.28 |
申请号 |
US19930069109 |
申请日期 |
1993.05.28 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
ARIMOTO, MASAO |
分类号 |
H03M1/10;H03M1/66;H03M1/68;(IPC1-7):H03M1/06 |
主分类号 |
H03M1/10 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|