发明名称 Lock detect circuit for detecting a lock condition in a phase locked loop and method therefor
摘要 A lock detect circuit (18) determines when a reference frequency and a feedback frequency are frequency locked using a reference counter (32) and a feedback counter (36). The reference counter (32) and the feedback counter (36) are clocked by the reference frequency and the feedback frequency, respectively. After a first period of time, the outputs of the counters are compared. The outputs of the counters are also compared at the end of a second period of time. To be frequency locked, the two count values must be equal at both the end of the first and the second periods of time. A count window is generated from the reference frequency signal to indicate a range of frequencies for which the feedback frequency is locked. Once lock is achieved, the count window is widened such that the feedback frequency is still within a lock range when some aliasing occurs.
申请公布号 US5394444(A) 申请公布日期 1995.02.28
申请号 US19930088951 申请日期 1993.07.12
申请人 MOTOROLA, INC. 发明人 SILVEY, JOHN M.;SMALLWOOD, J. CHRISTOPHER
分类号 H03L7/089;H03L7/095;H03L7/107;(IPC1-7):H04L7/00;H03D3/24 主分类号 H03L7/089
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