| 摘要 |
A digital-to-analog converter including a plurality of binarily-weighted states each incorporating a differential switch-pair circuit which includes two matched bi-polar switch transistors (Q1, Q2) the bases of which are driven by a corresponding pair of complementary signal sources. Two additional switches (SW1, SW2) are included in this circuit, with each such switch being connected between a respective signal source and its corresponding transistor control electrode. These two switches are both opened before the clock-controlled activation of the complementary signal sources. A short time after such activation, sufficient to assure that the complementary signal voltages have stabilized at their new values, the two additional switches are reclosed simultaneously by a single control signal so as to effect synchronized switchover of the two switch transistors at that instant. Capacitors (L1, L2) included to maintain effectively constant the base voltages of the two switch transistors during the time that the two additional switches are open.
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