MONITORING CIRCUIT

摘要

MONITORING CIRCUIT A monitoring circuit for digital circuits is disclosed. The monitor is primarily applicable to digital circuits which operate in a cyclic mode with the digital patterns generated during each cycle being repeated in a predictable manner. A predetermined number of expected bit patterns are stored in a programmable memory. The stored bit patterns correspond on a bit-by-bit basis to the bit patterns generated by the circuit being monitored when this circuit is operating normally. In the self-scan mode each pattern generated by the circuit being monitored is compared to each of the patterns stored in the memory in a sequential manner. Each time a pattern generated by the circuit being monitored is found to identically correspond to a pattern stored in the memory a valid pattern pulse is generated which steps a down counter one count. If this process does not result in the down counter being stepped the expected number of times during the operating cycle, a flipflop is set indicating that the circuit being monitored has malfunctioned. Provisions are also included for counting the transitions of a digital signal during predetermined portions of the cycle of the circuit being monitored and for monitoring the polarity and amplitude of a predetermined number of analog voltages. The result of all of these tests are combined to generate a signal indicating the operational status of the circuit being monitored. The monitoring circuit may also be operated in a one-to-one correspondence mode. In this mode each bit pattern generated by the circuit being monitored are compared to bit patterns stored in a selected memory location. If these bit patterns are not identical, a malfunction signal is generated.