发明名称
摘要 PURPOSE:To enable a semiconductor device to be constructed in multiple layers, by repeating the processes of filling a contact hole with a conductive material and of forming an upper semiconductor device on an interlayer insulation layer. CONSTITUTION:After the formation of the first layer of MOS transistor, a first interlayer insulation layer 5 of SiO2 or of a two-layer structure consisting of SiO2 and PSG layers is formed. The second layer of MOS transistor is then formed on the first interlayer insulation layer 5. A polysilicon layer is deposited on a gate SiO2 film formed on the second Si layer 6 and patterned to form a second gate electrode 7. A first contact hole 18 is formed in the first insulation layer 5 before the formation of the second gate electrode 7, and is filled with a conductive material. After forming a second interlayer insulation layer 10 thereon, second contact holes 19 and 20 are formed directly over the first contact hole 18 and in a part of a second drain region 9, respectively. When a first gate electrode 11 is produced, these contact holes are filled with a conductive material and the resistance is reduced. Repeating these procedures, a conducting path 21-23 can be provided. In this manner, multilayer construction is enabled and a three-dimensional IC can be obtained with a high yield.
申请公布号 JPH0715970(B2) 申请公布日期 1995.02.22
申请号 JP19850213021 申请日期 1985.09.26
申请人 发明人
分类号 H01L23/522;H01L21/28;H01L21/3205;H01L21/768;H01L27/00;H01L27/06;(IPC1-7):H01L27/00 主分类号 H01L23/522
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