发明名称 Apparatus for parallel decoding of variable length encoded image signals.
摘要 <p>An apparatus for parallel decoding of encoded image signals supplied in the form of an encoded bit stream, each of the image frames being decomposed into a predetermined number of variable length encoded blocks in the encoded bit stream, comprises: a circuit (10) having a single input terminal and N output terminals for receiving the encoded bit stream through the single input terminal, and demultiplexing the blocks in the encoded bit stream over the N output terminals; N parallel processing paths, each including a buffer memory (31A,31B,...,31N) respectively for performing the decoding operation including the variable length decoding on the blocks provided in its buffer memory; a provisional buffer memory circuit (20), disposed between the N output terminals and the N parallel processing paths, for temporarily storing the blocks to be applied to the respective buffer memory when the respective buffer memory is in a buffer full state, and providing the blocks to the respective buffer memory as the respective buffer memory has been released from the buffer full state; and a circuit (40) for multiplexing the output signals from the N parallel processing paths into a single data stream. The parallel decoding apparatus of the present invention can perform the decoding operation optimally with N buffer memories having an overall storage capacity far less than the prior art parallel decoding apparatus. &lt;IMAGE&gt;</p>
申请公布号 EP0631440(A3) 申请公布日期 1995.02.22
申请号 EP19940109487 申请日期 1994.06.20
申请人 DAE WOO ELECTRONICS CO LTD 发明人 YOON SANG-HO
分类号 G06T1/20;G06T9/00;H03M7/40;H03M7/42;H04N19/00;H04N19/102;H04N19/196;H04N19/423;H04N19/426;H04N19/44;H04N19/60;H04N19/625;H04N19/91;(IPC1-7):H04N7/13;H03M7/30 主分类号 G06T1/20
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