发明名称
摘要 <p>PURPOSE:To increase easily the number of accommodated bits per case without reducing the size of a memory cell or increasing the size of the case by outputting storage data only when an address having a pre-designated value at a part of bits is inputted. CONSTITUTION:In using a memory chip, a fuse element 155, one of elements 151 and 152, one of fuse elements 153 and 154, in total three fuse elements are cut. In this case, the memory chip is selected with an expanded address corresponding to the cut fuse element and outputs data. When, e.g., the fuse elements 155, 151, 153 are cut, the memory chip is selected with a level of address input terminals (An+1,An+2)=1.0.</p>
申请公布号 JPH0715794(B2) 申请公布日期 1995.02.22
申请号 JP19850138824 申请日期 1985.06.25
申请人 发明人
分类号 G11C8/00;G11C5/00;G11C11/41;(IPC1-7):G11C11/41 主分类号 G11C8/00
代理机构 代理人
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