发明名称 AMPLIFICATION TYPE DRAM MEMORY CELL AND MANUFACTURE THEREOF
摘要 PURPOSE:To reduce the area of a memory cell and to contrive a high degree of integration by a method wherein the word line of the write transistor and the readout transistor, to be used for a breadth type DRAM, is commonly used. CONSTITUTION:The gate electrode of the write transistor 26 and the gate electrode of a readout transistor 30 in an amplification type DRAM memory cell are connected by a single word line 32. When the readout transistor 30 is driven, the threshold voltage of the write transistor 26 is set higher than the threshold voltage of the readout transistor 30 so that the write transistor 26 is not driven. As a result, an excellent read operation can be obtained even by the single word line 32. Accordingly, the area of the memory cell can be reduced, and a high degree of integration can be accomplished.
申请公布号 JPH0745716(A) 申请公布日期 1995.02.14
申请号 JP19930184240 申请日期 1993.07.26
申请人 SONY CORP 发明人 NISHIHARA TOSHIYUKI
分类号 H01L27/10;G11C11/402;H01L21/8242;H01L27/108;H01L29/78;H01L29/786 主分类号 H01L27/10
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