发明名称 CARRIER RECOVERY CIRCUIT
摘要 PURPOSE:To reduce the lock time by varying a phase difference of an output signal of a filter section with a signal resulting from integrating a phase difference between a reception base band signal whose modulation component is eliminated and a recovered carrier and using a linear PLL section to generate the recovered carrier. CONSTITUTION:A received n-phase PSK modulation wave is detected by a phase detector 1 to obtain a base band signal having a phase component. An adder 9 of a linear PLL section 6 controls a phase of a signal formed by eliminating a noise component from an output eliminated with a modulation component in a modulation component eliminating section 4 at a filter section 5. A recovered carrier is generated thereby and a phase information extract section 2 extracts phase information from the received base band signal by using the recovered carrier. Since the linear PLL 6 is used, the lock time is reduced more than a conventional circuit employing a quadratic PLL.
申请公布号 JPH0746282(A) 申请公布日期 1995.02.14
申请号 JP19930191137 申请日期 1993.08.02
申请人 FUJITSU LTD 发明人 FURUKAWA HIDETO
分类号 H04L27/227 主分类号 H04L27/227
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