发明名称 Divider circuit structure
摘要 A divider circuit provides an output signal having a frequency which is equal to the frequency of an input signal divided by an odd integer. This is achieved by feeding back the output from a binary counter through an AND gate, delay flip-flop and an OR gate so that one cycle is added the output of the binary counter.
申请公布号 US5390223(A) 申请公布日期 1995.02.14
申请号 US19920907189 申请日期 1992.07.01
申请人 NOKIA MOBILE PHONES LTD. 发明人 LINDHOLM, RUNE
分类号 H03K23/50;(IPC1-7):H03K23/54 主分类号 H03K23/50
代理机构 代理人
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