SEMICONDUCTOR STORAGE DEVICE

摘要

PURPOSE:To prevent error data from being outputted and to elliminate the deterioration of data reading operation speed by forcedly executing precharging operation correspondingly to memory cell transistors(TRs) in a section corresponding to a delayed time difference for the selection of a word line. CONSTITUTION:An output 102 from a Y decoder 4 selects a digit line D through a TR 9 in a Y selector 8 and an output 103 from an X decoder 3 selects a word line W from the memory cell 6. The selection of the D line generates a delay time Td from the selection of the W line due to its activation by light. A transition detecting circuit ATD 2 detects a change in an address signal 101 outputted from an address circuit 1, only in the period of Td, supplies an ATD signal to a current supply circuit 5 to turn the circuit 5 to a driven state and forcedly turn the output of a sense amplifier 10 to an 'L' level. In the period Td, the output of the sense amplifier 10 can eliminate an error precharge data output to a memory cell TR 7 and evade the delay of reading operation speed.