Non-volatile semiconductor memory with increased capacitance between floating and control gates

摘要

In a semiconductor device, a first gate electrode and isolation layers are formed on a first gate insulation layer on a p-type silicon semiconductor substrate, and a second gate electrode is formed on the first gate electrode with a second gate insulation layer interposed therebetween. The first gate electrode is constituted by a first polycrystalline silicon layer, a second polycrystalline silicon layer and an etching stopper thin film interposed therebetween. The first gate electrode is formed by anisotropic-etching or selectively etching the second polycrystalline silicon layer, so that the etching stopper is maintained.