发明名称 FABRICATION OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To monitor the correlation of the extent of overlap between semiconductor circuit patterns with the error thereof precisely. CONSTITUTION:A cell test pattern including a basic cell 11 for test and an overlap error measuring pattern 13 are included in a semiconductor chip in the form of repeating basic cells. Consequently, the basic cell 11 for test exhibiting the proximity effect equivalent to that of the basic cell in a semiconductor circuit can be formed in a cell test pattern. Furthermore, the correlation of the extent of overlap between the cell test patterns with the error thereof can be measured while suppressing the influence of the distortion of lens image, the distortion of wafer, and the relative positional error of reticle pattern.
申请公布号 JPH0745495(A) 申请公布日期 1995.02.14
申请号 JP19930191539 申请日期 1993.08.03
申请人 NEC CORP 发明人 TONAI KEIICHIRO
分类号 H01L21/027;H01L21/66;H01L23/544;(IPC1-7):H01L21/027 主分类号 H01L21/027
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