| 摘要 |
<p>A reference potential generating circuit comprises a first PMOS transistor having its gate and its drain connected in common to a first node and its source connected to Vcc, a second PMOS transistor having its gate and its drain connected in common to a second node and its source connected to Vcc, a resistor connected between the first node and the second node, and a first current source connected between the first node and ground. A third PMOS transistor is connected at its gate to the second node and at its source connected to Vcc, so that a current mirror is constituted of the second and third transistors. A fourth PMOS transistor is connected at its source connected to a drain of the third PMOS transistor. A gate of the fourth PMOS transistor is connected to the first node, and a drain of the fourth PMOS transistor is connected to one end of a second resistor having its other end grounded. A reference potential is generated from the one end of the second resistor. <IMAGE></p> |
