发明名称 ARITHMETIC UNIT
摘要 PURPOSE:To provide an arithmetic unit which is capable of performing a calculation at a high speed and simplifying a program in the arithmetic operation and the logical shift calculation for plural kinds of the number of shift. CONSTITUTION:A shift number memory 3 stores shift numbers in order of addresses through an input data bus 1 and a shift number is given to a barrel shifter 2 by a shift number bus 4. A shift number memory pointer 5 sets to the address of the shift number memory 3 through the input data bus 1. When plural kinds of variable shift numbers exist and data is shifted by using each of the shift numbers, the contents of the address of the shift number 3 shown by the shift number memory pointer 5 is given to the shift number bus 4. An arithmetic operation or a logical shift calculation is performed for the input data from the input data bus 1 by the barrel shifter 2 by the shift number imparted from the shift number bus 4, and the shift result is outputted to an output data bus 7 via an ALU 6.
申请公布号 JPH0736663(A) 申请公布日期 1995.02.07
申请号 JP19930181174 申请日期 1993.07.22
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MINAMIDA TOMOAKI
分类号 G06F7/00;G06F7/76 主分类号 G06F7/00
代理机构 代理人
主权项
地址