发明名称 MEMRY PERIPHERAL CIRCUIT
摘要 PURPOSE:To achieve an efficient verification by preventing increase in test vectors attributed to. the initialization of memory in the verification (testing) of an LSI containing the memory. CONSTITUTION:This memory peripheral circuit comprises an address memory circuit 2 for storing a writing address, an address comparator circuit 3 to compare a reading address with the writing address stored, an initial value generation circuit 4 to generate an initial value corresponding to the reading address and a selector 5 to select the initial value corresponding to the data read out of the memory 1 and the reading address by an output of the address comparator circuit. This memory peripheral circuit is added to the inside of an LSI having a memory cell 1.
申请公布号 JPH0735820(A) 申请公布日期 1995.02.07
申请号 JP19930176431 申请日期 1993.07.16
申请人 NEC CORP 发明人 HOTTA TOSHIMI
分类号 G01R31/28;G06F11/22;G11C29/00;G11C29/02;G11C29/56 主分类号 G01R31/28
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