发明名称 |
Method of forming trench isolation structure in an integrated circuit |
摘要 |
The reliability of integrated circuits fabricated with trench isolation is improved by increasing the thickness of the gate dielectric overlying the trench corner. After the trench isolation region (40, 56) has been formed a thin layer of silicon dioxide (44) is chemically vapor deposited over the trench isolation region (44) and the adjacent active region (23). A transistor gate electrode (46) is subsequently formed over the thin layer of silicon dioxide (44). The thin layer of silicon dioxide (44) increases the thickness of the gate dielectric that lies between the transistor gate electrode (46) and the trench corner, and therefore the breakdown voltage of the gate dielectric at the trench corner is increased.
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申请公布号 |
US5387540(A) |
申请公布日期 |
1995.02.07 |
申请号 |
US19930130052 |
申请日期 |
1993.09.30 |
申请人 |
MOTOROLA INC. |
发明人 |
POON, STEPHEN S.;TSENG, HSING-HUANG |
分类号 |
H01L21/76;H01L21/762;H01L21/763;(IPC1-7):H01L21/76;H01L21/302 |
主分类号 |
H01L21/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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