| 摘要 |
PCT No. PCT/DE87/00217 Sec. 371 Date Dec. 23, 1988 Sec. 102(e) Date Dec. 23, 1988 PCT Filed May 9, 1987 PCT Pub. No. WO88/00413 PCT Pub. Date Jan. 14, 1988.A transistor arrangement, particularly for the fast switching of inductive loads, includes a driving first transistor and a power output second transistor (T1, T2) interconnected as a Darlington pair having a base terminal, an emitter terminal and a collector terminal. A third transistor (T3) has its collector connected to the base of the first transistor (T1) and its emitter connected to the emitter terminal (E). A fourth transistor (T4) of a conductivity type opposite to that of the first, second and third transistors has its base connected to the collector terminal, its emitter connected to the base terminal, and its collector connected to the base of the third transistor (T3). This structure is particularly suited for a monolithic integration.
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